CADENERGY - Case Study 2

Last updated 14 September 2005

Cost Reduction Components on one side and layer count reduction.

The customer was developing an embedded system for the telecommunications market. The design employed fast digital logic, digital signal processors and fast memory. Package types in use were TSOP, TSSOP, TQFP, SOJ and PLCC.

There were two main issues with this design:

The first was getting the original design (not done by us) through EMC (especially radiated emissions), electrical safety and telecommunications approvals.
The second issue was the high cost of Assembly.

The original design was a 6-layer board with components on both sides. We offered to re-design the board to the same overall dimensions with fixed positions for connectors etc., and reduce the layer count from 6 to 4 w ith all components on the topside only.

The result:

The design flew through manufacture, assembly and approvals.

Testimony

"Cadenergys strong points are:

On-time delivery to an agreed price.
In-depth understanding of layout issues in high speed circuits minimising EMC while maximizing signal integrity.
Design for Manufacture and Test layers are minimized and components are located on one side only, wherever possible.

As a result we hit our cost, quality and time to market business case targets and set a new standard for future projects."

D.B. Ireland.